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december 2011 doc id 17074 rev 5 1/31 1 VNH5180A-E automotive fully integrated h-bridge motor driver features output current: 8 a 3 v cmos compatible inputs undervoltage shutdown overvoltage clamp thermal shutdown cross-conduction protection current and power limitation very low standby power consumption pwm operation up to 20 khz protection against loss of ground and loss of v cc current sense output proportional to motor current output protected against short to ground and short to v cc package: ecopack ? description the VNH5180A-E is a full bridge motor driver intended for a wide range of automotive applications. the device incorporates a dual monolithic high-side driver and two low-side switches. both switches are designed using stmicroelectronics? well known and proven proprietary vipower ? m0 technology that allows to efficiently integrate on the same die a true power mosfet with an intelligent signal/protection circuitry. the three dies are assembled in powersso-36 tp package on electrically isolated leadframes. this package, specifically designed for the harsh automotive environment offers improved thermal performance thanks to exposed die pads. moreover, its fully symmetrical mechanical design allows superior manufacturability at board level. the input signals in a and in b can directly interface to the microcontroller to select the motor direction and the brake condition. the diag a /en a or diag b /en b , when connected to an external pull-up resistor, enables one leg of the bridge. each diag a /en a provides a feedback digital diagnostic signal as well. the normal operating condition is explained in the truth table. the cs pin allows to monitor the motor current by delivering a current proportional to its value when cs_dis pin is driven low or left open. when cs_dis is driven high, cs pin is in high impedance condition. the pwm, up to 20 khz, allows to control the speed of the motor in all possible conditions. in all cases, a low level state on the pwm pin turns off both the ls a and ls b switches. type r ds(on) i out v ccmax VNH5180A-E 180 m max ( per leg) 8a 41v powersso-36 tp table 1. device summary package order codes tube tape and reel powersso-36 tp VNH5180A-E vnh5180atr-e www.st.com
contents VNH5180A-E 2/31 doc id 17074 rev 5 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.1 reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1 powersso-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1.1 thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1.2 thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.2 powersso-36 tp package information . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 powersso-36 tp packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
VNH5180A-E list of tables doc id 17074 rev 5 3/31 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 5. pin functions description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 6. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. logic inputs (ina, inb, ena, enb, pwm, cs_dis). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 10. switching (vcc = 13 v, rload = 5 w) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 11. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 12. current sense (9 v < vcc < 18 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 13. truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5 table 14. truth table in fault conditions (detected on outa). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 15. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 16. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 17. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 18. thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 23 table 19. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 20. powersso-36 tp mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 21. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
list of figures VNH5180A-E 4/31 doc id 17074 rev 5 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. definition of the low-side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. definition of the high-side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. definition of dynamic cross conduction current during a pwm operation. . . . . . . . . . . . . . 14 figure 8. definition of delay response time of sense current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. waveforms in full-bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 10. waveforms in full-bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 11. typical application circuit for dc to 20 khz pwm operation short circuit protection . . . . . 19 figure 12. behavior in fault condition (how a fault can be cleared) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 13. half-bridge configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 14. multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 15. powersso-36? pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 16. chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 17. auto and mutual rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . 23 figure 18. detailed chipset configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 19. powersso-36 hsd thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 25 figure 20. powersso-36 lsd thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . 25 figure 21. thermal fitting model of an h-bridge in powersso-36. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 22. powersso-36 tp package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 23. powersso-36 tp tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 24. powersso-36 tp tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
VNH5180A-E block diagram and pin description doc id 17074 rev 5 5/31 1 block diagram and pin description figure 1. block diagram table 2. block description name description logic control allows the turn-on and the turn-off of the high-side and the low-side switches according to the truth table. undervoltage shuts down the device for battery voltage lower than 5v. high-side and low-side clamp voltage protect the high-side and the low-side switches from the high voltage on the battery line. high-side and low-side driver drive the gate of the concerned switch to allow a proper r ds(on) for the leg of the bridge. current limitation limits the motor current in case of short circuit. high-side and low-side overtemperature protection in case of short-circuit with the increase of the junction temperature, it shuts down the concerned driver to prevent degradation and to protect the die. low-side overload detector detects when low side current exceeds shutdown current and latches off the concerned low side. fault detection signalizes the abnormal behaviour of the switch (output shorted to ground or output shorted to battery) by pulling down the concerned enx/diagx pin. power limitation limits the power dissipation of the high-side driver inside safe range in case of short to ground condition. 3/52#%?(3 ! + 3)'.!, #,!-0 0/7%2 ,)- )4!4)/. &!5,4 $%4%#4)/. 5 6 ,3 " ?/6%24%-0%2!452% (3 " ?/6%24%-0%2!452% (3 ! ?/6%24%-0%2!452% ,3 ! ?/6%24%-0%2!452% ,/')# #,!-0?,3 ! $2)6%2 (3 ! #,!-0?(3 ! #522%.4 ,)-)4!4)/.?! (3 ! $2)6%2 ,3 ! ,3 ! '.$ ! /6%2,/!$ $%4%#4/2?! 6 ## $)!' ! %. ! ). ! #3 #3?$)3 07- ). " $)!' " %. " $2)6%2 (3 " (3 " #,!-0?(3 " #522%.4 ,)-)4!4)/.?" #,!-0?,3 " ,3 " '.$ " $2)6%2 ,3 " /6%2,/!$ $%4%#4/2?" 3/52#%?(3 " + $2!).?,3 ! $2!).?,3 " ("1($'5
block diagram and pin description VNH5180A-E 6/31 doc id 17074 rev 5 figure 2. configuration diagram (top view) table 3. suggested connections for unused and not connected pins connection / pin current sense n.c. source_hsx drain_lsx inputx, pwm diagx/enx cs_dis floating not allowed x x x x to ground through 1 k resistor x not allowed x through 10 k resistor table 4. pin definitions and functions pin n symbol function 13, 24 v cc , heat slug1 drain of high-side switches and power supply voltage. 1, 5, 9, 14, 18, 23, 28, 32, 36 nc not connected. 15 in a clockwise input 16 en a /diag a status of high-side and low-side switches a; open drain output. 17 in_pwm pwm input. 19 cs output of current sense. 1 en/diag _ a cs 19 in_a gnd_b gnd_a in_b en/diag _ b 18 nc source hs b gnd_b slug1 slug2 slug3 36 source hs a gnd_a gnd_a gnd_a drain ls a source hs a source hs a v cc nc v cc source hs b source hs b drain ls b gnd_b gnd_b drain ls b nc nc nc in_pwm nc cs_dis nc nc nc drain ls a
VNH5180A-E block diagram and pin description doc id 17074 rev 5 7/31 20 cs_dis active high cmos compatible pin to disable current sense pin. 21 en b /diag b status of high-side and low-side switches b; open drain output. 22 in b counter clockwise input. 25, 26, 27, 29, 35 out b , heat slug3 source of high-side switch b / drain of low-side switch b. 30, 31, 33, 34 gnd b source of low-side switch b. 2, 8, 10, 11, 12 out a, heat slug2 source of high-side switch a / drain of low-side switch a. 3, 4, 6, 7 gnd a source of low-side switch a. table 5. pin functions description name description v cc battery connection. gnd power ground. out a out b power connections to the motor. in a in b voltage controlled input pins with hysteresis, cmos compatible. these two pins control the state of the bridge in normal operation according to the truth table (brake to v cc , brake to gnd, clockwise and counterclockwise). pwm voltage controlled input pin with hysteresis, cmos compatible. gates of low-side fets get modulated by the pwm signal during their on phase allowing speed control of the motor. en a /diag a en b /diag b open drain bidirectional logic pins.these pins must be connected to an external pull up resistor. when externally pulled low, they disable half-bridge a or b. in case of fault detection (thermal shutdown of a high-side fet or excessive on-state voltage drop across a low-side fet), these pins are pulled low by the device (see table 14: truth table in fault conditions (detected on outa) ). cs analog current sense output. this output delivers a current proportional to the motor current if cs_dis is low or left open. the information can be read back as an analog voltage across an external resistor. cs_dis active high cmos compatible pin to disable the current sense pin. table 4. pin definitions and functions (continued) pin n symbol function
electrical specifications VNH5180A-E 8/31 doc id 17074 rev 5 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stressing the device above the rating listed in the table 6: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality document. v cc in a i s i outa i ina v ina v cc v outa i sense v outb diag a /en a i ena i gnd i outb in b i inb diag b /en b i enb v enb v ena v inb v sense out a out b pwm cs i pw v pw gnd v csd i csd cs_dis table 6. absolute maximum ratings symbol parameter value unit v cc supply voltage + 41 v i max maximum output current (continuous) internally limited a i r reverse output current (continuous) -15 a i in input current (in a and in b pins) +/- 10 ma i en enable input current (diag a /en a and diag b /en b pins) +/- 10 ma i pw pwm input current +/- 10 ma i cs_dis cs_dis input current +/- 10 ma v cs current sense maximum voltage v cc -41/+v cc v v esd electrostatic discharge (human body model: r=1.5 k , c=100 pf) 2kv t c junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c i gnd dc reverse ground pin current 200 ma
VNH5180A-E electrical specifications doc id 17074 rev 5 9/31 2.2 thermal data 2.3 electrical characteristics values specified in this section are for v cc = 9 v up to 18 v; -40 c < t j < 150 c, unless otherwise specified. table 7. thermal data symbol parameter max. value unit r thj-case thermal resistance junction-case (per leg) hsd 4.8 c/w lsd 4.6 r thj-amb thermal resistance junction-ambient see figure 17 c/w table 8. power section symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 5.5 18 v i s supply current off-state with all fault cleared and enx = 0 (standby) in a =in b =pwm=0; t j = 25 c; v cc =13v 36a off-state with all fault cleared and enx = 0 (standby) in a =in b =pwm=0; v cc =13v; t j =- 40 to 150 c 10 a off-state (no standby) in a =in b =pwm=0; enx=5v; t j =- 40 to 150 c 5ma on-state: in a or in b = 5 v; no pwm 36ma on-state: in a or in b =5v; pwm=20khz 6ma r onhs static high-side resistance i out = 2.5 a; t j = -40 c 75 m i out = 2.5 a; t j =25c 115 m i out = 2.5 a; t j = 150 c 230 m i out = 2.5 a; t j =- 40 to 150 c 250 m r onls static low-side resistance i out = 2.5a; t j =25c 53.5 m i out = 2.5a; t j =- 40 to 150 c 110 m v f high-side free-wheeling diode forward voltage i out =-2.5a; t j = 150 c 0.7 0.9 v
electrical specifications VNH5180A-E 10/31 doc id 17074 rev 5 i l(off) high-side off-state output current (per channel) t j =25c; v outx =en x =0v; v cc =13v 03a t j = 125 c; v outx =en x =0v; v cc =13v 05a i rm dynamic cross- conduction current i out = 2.5a (see figure 6 )0.6a table 9. logic inputs (in a , in b , en a , en b , pwm, cs_dis) symbol parameter test conditions min. typ. max. unit v il input low level voltage normal operation (diag x /en x pin acts as an input pin) 0.9 v v ih input high level voltage normal operation (diag x /en x pin acts as an input pin) 2.1 v v ihyst input hysteresis voltage normal operation (diag x /en x pin acts as an input pin) 0.15 v v icl input clamp voltage i in = 1 ma 5.5 6.3 7.5 v i in =-1ma -1.0-0.7-0.3 v i inl input current v in =0.9v 1 a i inh input current v in =2.1v 10 a v diag enable output low level voltage fault operation (diag x /en x pin acts as an output pin); i en =1ma 0.4 v table 10. switching (v cc =13v, r load =5 ) symbol parameter test conditions min. typ. max. unit f pwm frequency 0 20 khz t d(on) turn-on delay time input rise time < 1s (see figure 6 ) 250 s t d(off) turn-off delay time input rise time < 1s (see figure 6 ) 250 s t r rise time see figure 5 12s t f fall time see figure 5 12s t del delay time during change of operating mode see figure 4 200 400 1600 s t rr high-side free wheeling diode reverse recovery time see figure 7 400 ns table 8. power section (continued) symbol parameter test conditions min. typ. max. unit
VNH5180A-E electrical specifications doc id 17074 rev 5 11/31 table 11. protections and diagnostics symbol parameter test conditions min. typ. max. unit v usd undervoltage shutdown 3 5 v v usdhyst undervoltage shutdown hysteresis 0.5 v i lim_h high-side current limitation 8 12 16 a i sd_ls shutdown ls current 16 30 52 a v clph high-side clamp voltage (v cc to out a =0 or out b =0) i out = 2.5 a 41 46 52 v v clpls low-side clamp voltage (out a =v cc or out b = v cc to gnd) i out =2.5a 41 46 52 v t tsd (1) 1. t tsd is the minimum threshold temperature between hs and ls thermal shutdown temperature v in = 2.1 v 150 175 200 c t tr (2) 2. valid for both hsd and lsd. thermal reset temperature 135 c t hyst (2) thermal hysteresis (t sd -t r )7c t tsd_ls low-side thermal shutdown temperature v in = 2.1 v 150 175 200 c v clp total clamp voltage (v cc to gnd) i out =2.5a 41 46 52 v t sd_ls time to shutdown for the low-side 10 s table 12. current sense (9 v < v cc <18v) symbol parameter test conditions min. typ. max. unit k 0 i out /i sense i out =0.35a; v sense = 0.32 v; v csd =0v; t j = - 40 to 150 c 645 840 1140 k 1 i out /i sense i out =1a; v sense = 0.98 v; v csd =0v; t j = - 40 to 150 c 700 820 955 k 2 i out /i sense i out = 2.5 a; v sense =2.4v; v csd =0v; t j = - 40 to 150 c 710 810 900 k 3 i out /i sense i out =4a; v sense =4v; v csd =0v; t j = - 40 to 150 c 690 790 900 dk 0 /k 0 (1) analog sense current drift i out = 0.35a; v sense = 0.32v; v csd =0v; t j = - 40 to 150 c -18 18 % dk 1 /k 1 (1) analog sense current drift i out =1a; v sense = 0.98 v; v csd =0v; t j = - 40 to 150 c -13 13 % dk 2 /k 2 (1) analog sense current drift i out =2.5a; v sense =2.4v; v csd =0v; t j = - 40 to 150 c -13 13 % dk 3 /k 3 (1) analog sense current drift i out =4a; v sense =4v; v csd =0v; t j = - 40 to 150 c -13 13 % v sense max analog sense output voltage i out =2.5a; v csd =0v; r sense =2k 5v
electrical specifications VNH5180A-E 12/31 doc id 17074 rev 5 figure 4. definition of the delay times measurement i sense0 analog sense leakage current i out =0a; v sense =0v; v csd =5v; v in =0v; t j = - 40 to 150 c 05a v csd =0v; v in =5v; t j = - 40 to . 150 c 0 180 a v csd =5v; v in =5v; i out =2.5a; t j = - 40 to . 150 c 05a t dsenseh delay response time from falling edge of cs_dis pin v in =5v; v sense <4v, i out =2.5a , i sense =90% of i sensemax (see figure 8 ) 50 s t dsensel delay response time from rising edge of cs_dis pin v in =5v; v sense <4v; i out =2.5a; i sense =10% of i sensemax (see figure 8 ) 20 s 1. analog sense current drift is deviation of fact or k for a given device over (-40 c to 150 c and 9v < v cc < 18 v) with respect to its value measured at t j = 25 c, v cc = 13 v. table 12. current sense (9 v < v cc < 18 v) (continued) symbol parameter test conditions min. typ. max. unit t t v inb v ina t pwm t i load t del t del
VNH5180A-E electrical specifications doc id 17074 rev 5 13/31 figure 5. definition of the low-side switching times figure 6. definition of the high-side switching times t f pwm t t v outa, b 20% 90% 80% 10% t r t t v outa v ina 90% 10% t d(on) t d(off)
electrical specifications VNH5180A-E 14/31 doc id 17074 rev 5 figure 7. definition of dynamic cross conduction current during a pwm operation figure 8. definition of delay response time of sense current t t i motor pwm t v outb t i cc t rr i rm in a = 1, in b =0 sense current input load current cs_dis t dsenseh t dsensel
VNH5180A-E electrical specifications doc id 17074 rev 5 15/31 note: in normal operating conditions the diag x /en x pin is considered as an input pin by the device. this pin must be externally pulled high. table 13. truth table in normal operating conditions in a in b diag a /en a diag b /en b out a out b cs operating mode 1 1 11 h h high imp. brake to v cc 0l i sense =i out /k clockwise (cw) 0 1 l h counterclockwise (ccw) 0 l high imp. brake to gnd table 14. truth table in fault conditions (detected on out a ) in a in b diag a /en a diag b /en b out a out b cs (v csd =0v) 1 1 0 1 open h high imp. 0l 0 1hi outb /k 0l high imp. x x 0 open fault information protection action
electrical specifications VNH5180A-E 16/31 doc id 17074 rev 5 table 15. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5 v except for pulse 5b. number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv min. max. 1 -75v -100v 5000 pulses 0.5s 5s 2 ms, 10 2a +37v +50v 5000 pulses 0.2s 5s 50s, 2 3a -100v -150v 1h 90ms 100ms 0.1s, 50 3b +75v +100v 1h 90ms 100ms 0.1s, 50 4 -6v -7v 1 pulse 100ms, 0.01 5b (2) 2. valid in case of external load dum p clamp: 40v maximum referred to ground. +65v +87v 1 pulse 400ms, 2 table 16. electrical transient requirements (part 2) iso 7637-2: 2004(e) test pulse test level results (1) 1. the above test levels must be considered referred to v cc = 13.5 v except for pulse 5b. iii iv 1c c 2a c c 3a c c 3b c c 4c c 5b (2) 2. valid in case of external load dump clamp: 40v maximum referred to ground. cc table 17. electrical transient requirements (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
VNH5180A-E electrical specifications doc id 17074 rev 5 17/31 2.4 waveforms figure 9. waveforms in full-bridge operation normal operation (diag a /en a =1, diag b /en b =1) in a in b pwm out a out b i outa -> outb diag a /en a diag b /en b diag b /en b in a in b pwm out a out b diag a /en a normal operation (diag a /en a =1, diag b /en b =0 and diag a /en a =0, diag b /en b =1) cs (*) cs i outa -> outb t del t del load connected between out a , out b load connected between out a , out b (*) cs behaviour during pwm mode depends on pwm frequency and duty cycle cs_dis cs_dis in a in b t jhsa diag a /en a diag b /en b i lim t tsd_hsa t tr_hsa t j > t tr current limitation/thermal shutdown or out a shorted to ground cs i outa -> outb normal operation out a shorted to ground normal operation cs_dis t j < t tsd t j =t tsd power limitation limitation current
electrical specifications VNH5180A-E 18/31 doc id 17074 rev 5 figure 10. waveforms in full-bridge operation (continued) normal operation out a softly shorted to v cc normal operation undervoltage shutdown in a in b out a out b diag b /en b diag a /en a out a shorted to v cc (resistive short) and undervoltage shutdown cs v outb cs_dis t j_lsa t tsd_ls normal operation out a hardly shorted to v cc normal operation undervoltage shutdown in a in b out a out b diag b /en b diag a /en a out a shorted to v cc (pure short) and undervoltage shutdown cs v outb cs_dis i lsa i sd_ls i lsa i sd_ls t j_lsa t tsd_ls
VNH5180A-E application information doc id 17074 rev 5 19/31 3 application information in normal operating conditions the diag x /en x pin is considered as an input pin by the device. this pin must be externally pulled high. pwm pin usage: in all cases, a ?0? on the pwm pin turns off both ls a and ls b switches. when pwm rises back to ?1?, ls a or ls b turn on again depending on the input pin state. figure 11. typical application circuit for dc to 20 khz pwm operation short circuit protection note: the value of the blocking capacitor (c) depends on the application conditions and defines voltage and current ripple on supply line at pwm operation. stored energy of the motor inductance may fly back into the blocking capacitor, if the bridge driver goes into 3-state. this causes a hazardous overvoltage if the capacitor is not big enough. as basic orientation, 500 f per 10 a load current is recommended. in case of a fault condition the diag x /en x pin is considered as an output pin by the device. the fault conditions are: ? overtemperature on one or both high-sides ? short to battery condition on the output (overcurrent detection on the low-side power mosfet) possible origins of fault conditions may be: out a is shorted to ground overtemperature detection on high-side a out a is shorted to v cc low-side power mosfet overcurrent detection when a fault condition is detected, the user can identify which power element is in fault by monitoring the in a , in b , diag a /en a and diag b /en b pins. m c reg 5v + 5v hs a hs b ls a ls b v cc diag a /en a diag a /en a cs in a pwm out a out b d s g b) n mosfet 3.3k 1k 1k 1k 10k 33nf 1.5k v cc diag b /en b +5v 1k 3.3k in b 1k gnd gnd vcc cs_dis 1k 100k
application information VNH5180A-E 20/31 doc id 17074 rev 5 in any case, when a fault is detected, the faulty leg of the bridge is latched off. to turn on the respective output (out x ) again, the input signal must rise from low to high level. figure 12. behavior in fault condition (how a fault can be cleared) note: in case of the fault condition is not removed, the procedure for unlatching and sending the device in stby mode is: - clear the fault in the device (toggle: in a if en a = 0 or in b if en b =0) - pull low all inputs, pwm and diag/en pins within t del . if the diag/en pins are already low, pwm = 0, the fault can be cleared simply toggling the input. the device enters in stby mode as soon as the fault is cleared. 3.1 reverse battery protection three possible solutions can be considered: ? a schottky diode d connected to v cc pin ? an n-channel mosfet connected to the gnd pin (see figure 11: typical application circuit for dc to 20 khz pwm operation short circuit protection ) ? a p-channel mosfet connected to the v cc pin the device sustains no more than -15 a in reverse battery conditions because of the two body diodes of the power mosfets. additionally, in reverse battery condition the i/os of VNH5180A-E is pulled down to the v cc line (approximately -1.5 v).
VNH5180A-E application information doc id 17074 rev 5 21/31 series resistor must be inserted to limit the current sunk from the microcontroller i/os. if i rmax is the maximum target reverse current through microcontroller i/os, series resistor is: figure 13. half-bridge configuration note: the VNH5180A-E can be used as a high power half-bridge driver achieving an on resistance per leg of 90 m . figure 14. multi-motors configuration note: the VNH5180A-E can easily be designed in multi-motors driving applications such as seat positioning systems where only one motor must be driven at a time. diag x /en x pins allow to put unused half-bridges in high impedance. r v ios v cc ? i rmax --------------------------------- = m out a out a out b out b v cc pwm diag a /en a in a diag b /en b in b gnd gnd pwm diag a /en a in a diag b /en b in b m 2 out a out a out b out b v cc pwm diag a /en a in a diag b /en b in b gnd gnd pwm diag a /en a in a diag b /en b in b m 1 m 3
package and pcb thermal data VNH5180A-E 22/31 doc id 17074 rev 5 4 package and pcb thermal data 4.1 powersso-36 thermal data figure 15. powersso-36? pc board double layers: footprint double layers: 2cm 2 of cu double layers: 8cm 2 of cu note: board finish thickness 1.6 mm +/- 10 %, board double layers, board dimension 129 mm x 60 mm, board material fr4, cu thickness 0.070 mm (front and back side), thermal vias spaced on a 1.2 mm x 1.2 mm grid, vias pad clearance thickness 0.2 mm, thermal via diameter 0.3 mm +/- 0.08 mm, cu thickness on vias 0.025 mm.
VNH5180A-E package and pcb thermal data doc id 17074 rev 5 23/31 figure 16. chipset configuration figure 17. auto and mutual r thj-amb vs pcb copper area in open box free air condition 4.1.1 thermal calculation in clockwis e and anti-clockwise operation in steady-state mode chip 1 r tha chip 2 chip 3 r thb r thc r thab r thac r thbc 0 10 20 30 40 50 60 70 80 0123456789 cm 2 of cu area (refer to pcb layout) c/w rtha rthb = rthc rthab = rthac rthbc table 18. thermal calculation in clockwise and anti-clockwise operation in steady- state mode hs a hs b ls a ls b t jhsab t jlsa t jlsb on off off on p dhsa x r thhs + p dlsb x r thhsls + t amb p dhsa x r thhsls + p dlsb x r thlsls + t amb p dhsa x r thhsls + p dlsb x r thls + t amb off on on off p dhsb x r thhs + p dlsa x r thhsls + t amb p dhsb x r thhsls + p dlsa x r thls + t amb p dhsb x r thhsls + p dlsa x r thlsls + t amb
package and pcb thermal data VNH5180A-E 24/31 doc id 17074 rev 5 4.1.2 thermal calculati on in transient mode t hs = p dhs ? z hs + z hsls ? (p dlsa + p dlsb ) + t amb t lsa = p dlsa ? z ls + p dhs ? z hsls + p dlsb ? z hsls + t amb t lsb = p dlsb ? z ls + p dhs ? z hsls + p dlsa ? z hsls + t amb figure 18. detailed chipset configuration equation 1: pulse calculation formula where chip 1 z ts chip 2 chip 3 z ls z ls z hsls z hsls z lsls z th r th z thtp 1 ? () + ? = t p t ? =
VNH5180A-E package and pcb thermal data doc id 17074 rev 5 25/31 figure 19. powersso-36 hsd thermal impedance junction ambient single pulse figure 20. powersso-36 lsd thermal impedance junction ambient single pulse zth -hsd @ cu area 0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000 time (sec) c/w hsd-8 cm^2 cu hsd-2 cm^2 cu hsd-footprint hslsd-8 cm^2 cu hslsd-2 cm^2 cu hslsd-footprint zth -lsd @ cu area 0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000 time (sec) c/w lsd-8 cm^2 cu lsd-2 cm^2 cu lsd-footprint lslsd-8 cm^2 cu lslsd-2 cm^2 cu lslsd-footprint z ls z lsls
package and pcb thermal data VNH5180A-E 26/31 doc id 17074 rev 5 figure 21. thermal fitting model of an h-bridge in powersso-36 table 19. thermal parameters (1) 1. the blank space means that the val ue is the same as the previous one. area/island (cm 2 ) footprint 2 8 r1 = r7 (c/w) 0.4 r2 = r8 (c/w) 3.5 r3 (c/w) 8 r4 (c/w) 30 16 11 r5 (c/w) 40 30 14 r6 (c/w) 36 34 21 r9 = r15 (c/w) 0.1 r10 = r16 (c/w) 5.2 r11 = r17 (c/w) 32 14 14 r12 = r18 (c/w) 49 21 21 r13 = r19 (c/w) 52 36 24 r14 = r20 (c/w) 50 40 33 r21 = r22 = r23 (c/w) 80 77 75 c1 = c7 = c9 = c15 (w.s/c) 0.0005 c2 = c8 (w.s/c) 0.008 c3 (w.s/c) 0.09 c4 (w.s/c) 0.5 0.8 0.8 c5 (w.s/c) 0.8 1.4 2 c6 (w.s/c) 7 8 10 c10 = c16 (w.s/c) 0.009 c11 = c17 (w.s/c) 0.09 0.07 0.07 c12 = c18 (w.s/c) 0.45 0.45 0.45 c13 = c19 (w.s/c) 0.8 1.2 1.4 c14 = c20 (w.s/c) 4 5 8 c21 = c22 = c23 (w.s/c) 0.005 0.003 0.003
VNH5180A-E package and packing information doc id 17074 rev 5 27/31 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 powersso-36 tp package information figure 22. powersso-36 tp package dimensions
package and packing information VNH5180A-E 28/31 doc id 17074 rev 5 table 20. powersso-36 tp mechanical data symbol millimeters min. typ. max. a 2.15 - 2.47 a2 2.15 - 2.40 a1 0 - 0.1 b 0.18 - 0.36 c 0.23 - 0.32 d 10.10 - 10.50 e 7.4 - 7.6 e-0.5- e3 - 8.5 - f2.3 g- -0.1 h 10.1 - 10.5 h- -0.4 k 0 deg 8 deg l0.6 - 1 m4.3 n - - 10 deg o1.2 q0.8 s2.9 t3.65 u1.0 x1 1.85 2.35 y1 3 3.5 x2 1.85 2.35 y2 3 3.5 x3 4.7 - 5.2 y3 3 - 3.5 z1 0.4 z2 0.4
VNH5180A-E package and packing information doc id 17074 rev 5 29/31 5.3 powersso-36 tp packing information figure 23. powersso-36 tp tube shipment (no suffix) figure 24. powersso-36 tp tape and reel shipment (suffix ?tr?) all dimensions are in mm. base qty 49 bulk qty 1225 tube length (0.5) 532 a 3.5 b 13.8 c (0.1) 0.6 a c b base qty 1000 bulk qty 1000 a (max) 330 b (min) 1.5 c (0.2) 13 f 20.2 g (+2 / -0) 24.4 n (min) 100 t (max) 30.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 (0.1) 4 component spacing p 12 hole diameter d (0.05) 1.55 hole diameter d1 (min) 1.5 hole position f (0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 (0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets sealed with cover tape. user direction of feed
revision history VNH5180A-E 30/31 doc id 17074 rev 5 6 revision history table 21. document revision history date revision changes 11-feb-2010 1 initial release. 28-sep-2010 2 updated following tables: ? table 7: thermal data ? table 8: power section ? table 12: current sense (9 v < vcc < 18 v) 13-oct-2010 3 updated chapter 3: application information updated following tables: ? table 18: thermal calculation in clockwise and anti-clockwise operation in steady-state mode ? table 19: thermal parameters 20-oct-2010 4 changed document status from target specification to definitive datasheet 22-dec-2011 5 updated figure 1: block diagram added table 3: suggested connections for unused and not connected pins table 11: protections and diagnostics : ?t tsd , t tr , t hyst : added note updated figure 9: waveforms in full-bridge operation and figure 10: waveforms in full-bridge operation (continued)
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